Jobs


Analog Layout (Job Code: ALE)

  • 3 to 6 years of experience in Layout for Analog IPs like Serdes , Rx , Tx , ADC , DAC , PLL , SERDES , Bandgap , OPAMP ,LDO regulators Temperature sensor..etc
  • Should have extensive experience in 28nm and below technology and MUST have completed atleast one design in FinFets (14nm/10nm)
  • The role will involve working on floorplan, layout and physical verification of leaf cells and blocks.
  • Applicants must be good team players.
  • Skill Programming will be added advantage.
  • Proficient with Cadence, Synopsys and Mentor design tools- Layout and Verification.
  • Qualification- Bachelors or Masters in Engineering.
Location: 
Bangalore
Job Type: 
Full Time
Department: 
Semiconductor
Qualification: 
Bachelors or Masters in Engineering.
Specific Requirement: 
3 to 6 years of experience in Layout for Analog IPs